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Virtualization News Desk
Virtualization - Intel Hexes AMD
While AMD stumbles around trying to get its first errata-free Barcelona quads out two years behind Intel, Intel is off planning the launch of its six-core Dunnington microprocessor, a hex, if you will, the last of the expected Core 2-based Xeon server chips before it switches over to the Nehalem microarchitecture capable of supporting eight or more cores.
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Dunnington succeeds not the two-socket 45 nm LGA 771 Harpertown (meant for the Stoakley platform) but the four-socket 65 nm Socket 604 Tigerton (meant for the Caneland platform), the Xeon MP launched September 6, 2007. Tigerton didn't have a 16 MiB L3 cache, but its predecessor, the 65 nm NetBurst microarchitecture based Tulsa, did.

This processor will be interesting to watch. I am especially interested in how it will do on Java application server loads, since those workloads are especially sensitive to the size of the cache. SPECjbb2005 will be the benchmark to watch.


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